Up to 105 dB of SNR, 24-bit stereo CODEC with PDM to PWM transmodulator DAC and embedded regulator
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JPEG 2000 encoder for high-speed applications (up to multi-channel DCI 2K and 4K, HD 1080i and 1080p)
The JPEG 2000 encoder is dedicated to DCI (Digital Cinema Initiatives) and HD video applications. It applies JPEG 2000 encoding on un-tiled large color frames with 4:4:4, 4:2:2 or 4:2:0 sub-sampling. It generates streams compliant with the ISO/IEC 15444-1 specification (JPEG 2000).
The core performs the following video compression operations of the normalized encoding process: color transform (ICT/RCT), discrete wavelet transform (DWT), quantization, entropy encoding and rate allocation. It expects pixels under the following format at its input interface: 4:4:4, 4:2:2 or 4:2:0 color modes with 12-bit samples. It generates a j2c JPEG 2000 stream at its output interface. In case of 4:4:4 operation this stream is DCI compliant.
The core is optimized for speed and is able to deal with the demanding DCI and HD processing speeds: it is able to provide a single-chip FPGA solution for all 2K @24 fps, 2K @48fps, 4K @24fps, 720p30/60, 1080i and 1080p30/60 distributions. The flexible FPGA architecture allows the user to build a secure encoder by integrating Barco Silex cryptography encoders (DCI AES).
The core performs the following video compression operations of the normalized encoding process: color transform (ICT/RCT), discrete wavelet transform (DWT), quantization, entropy encoding and rate allocation. It expects pixels under the following format at its input interface: 4:4:4, 4:2:2 or 4:2:0 color modes with 12-bit samples. It generates a j2c JPEG 2000 stream at its output interface. In case of 4:4:4 operation this stream is DCI compliant.
The core is optimized for speed and is able to deal with the demanding DCI and HD processing speeds: it is able to provide a single-chip FPGA solution for all 2K @24 fps, 2K @48fps, 4K @24fps, 720p30/60, 1080i and 1080p30/60 distributions. The flexible FPGA architecture allows the user to build a secure encoder by integrating Barco Silex cryptography encoders (DCI AES).
特色
- Multi-channel HD
- Compliant with DCI (Digital Cinema Initiatives) recommendation
- Compliant with JPEG 2000 (ISO/IEC 15444-1)
- Integrated Intellectual Property core offering a full FPGA solution for HD and DCI JPEG 2000
- Single-chip FPGA solution for multi-channel:
- DCI: 2K @24fps, 2K @48fps and 4K @24fps
- HD: 720p30/60, 1080i, 1080p30/60
- Custom frame sizes up to 4096x2160
- Customizable output bit rate: up to 250 Mbps / 500 Mbps / 1 Gbps / lossless
- XYZ, RGB, YUV (4:4:4 or 4:2:2) color spaces with support for ICT/RCT color transform
- Supported encoder parameters:
- Wavelet filters: 9/7 and 5/3, 0 to 6 levels
- Full-frame encoding (no tiling)
- Pixel depth: up to 12 bits per color sample (lossless mode up to 16 bits)
- Code block size: 32x32 samples
- Configurable bit rate on a frame by frame basis with 3 selectable regulation modes
- CPRL / LRCP progression orders
- Minimal user intervention
- Fully synchronous design
- Can be used for FPGA, ASIC and Structured ASIC technologies
- Can be integrated with Barco Silex cryptography cores (AES) for advanced security
应用
- Broadcast
- Digital Cinema
- Archiving
- Local Video Distribution
- Video over IP
- Wireless
- Aerospace
- Medical
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