Jitter Cleaner PLL Digital Loop Filter

The DPLL is a digital loop filter/controller designed to be used in conjunction with Silicon Creations Fractional-N PLLs. The resulting dual-loop PLL can attenuate jitter in extremely noisy reference clocks (and "gapped clocks" such as in OTN SerDes repeater/switch systems) and multiply very low frequency clocks. The loop bandwidth of the combined PLL is determined by the digital loop filter and can be arbitrarily small while the quality of the output clock is determined by the connected Fractional-N PLL and its reference clock. The DPLL uses a modest number of gates and the resulting dual-loop PLL is fully integrated (no external components) with a total area little more than the embedded Fractional-N PLL.

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