Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk)
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Intelligent Vision Processor
The Ceva-XM4 imaging and computer vision processor IP solves the most critical issues for the development of energy-efficient embedded vision systems where die size and power budget are extremely constrained, yet algorithms require intensive processing.
The Ceva-XM4 and the associated tools and libraries combine to deliver a comprehensive vision IP platform that allows developers to simply and easily address the three key elements of intelligent vision processing, namely 3D vision, computational photography and visual perception and analytics.
Choosing the Ceva-XM4 opens up a new world of possibilities for the designer including running computer vision on video streams (1080p, 4K); combining depth generation with vision processing; enabling multi-app processing (e.g. gesture + face detection + emotions + eye-tracking + depth); and implementing multi-image algorithms in high-resolution.
Fully programmable in high-level languages, the Ceva-XM4 is an extremely high-performance, low-power, fully synthesizable DSP and memory subsystem IP core incorporating a wide-vector architecture with fixed- and floating-point processing, multiple simultaneous scalar units and a vision-oriented, low-power instruction set.
The Ceva-XM4 and the associated tools and libraries combine to deliver a comprehensive vision IP platform that allows developers to simply and easily address the three key elements of intelligent vision processing, namely 3D vision, computational photography and visual perception and analytics.
Choosing the Ceva-XM4 opens up a new world of possibilities for the designer including running computer vision on video streams (1080p, 4K); combining depth generation with vision processing; enabling multi-app processing (e.g. gesture + face detection + emotions + eye-tracking + depth); and implementing multi-image algorithms in high-resolution.
Fully programmable in high-level languages, the Ceva-XM4 is an extremely high-performance, low-power, fully synthesizable DSP and memory subsystem IP core incorporating a wide-vector architecture with fixed- and floating-point processing, multiple simultaneous scalar units and a vision-oriented, low-power instruction set.
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Block Diagram of the Intelligent Vision Processor
Vision Processor IP
- Unified Deep Learning Processor
- Imaging and Computer Vision Processor
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