Low latency Network TAP IP-Core for full duplex 100M/1G Ethernet links
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ARC4 Accelerator
As part of INSIDE Secure’s award-winning silicon Intellectual Property (IP) product portfolio, the EIP-44 is the IP for accelerating the ARC4 stream cipher algorithm (used for legacy SSL & IPsec).
Designed for fast integration, low gate count and full transforms, the EIP-44 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed crypto pipelines.
Designed for fast integration, low gate count and full transforms, the EIP-44 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed crypto pipelines.
特色
- Wide bus interface (32 bit data, 128 bit keys) or 32 bit register interface.
- Key sizes: 40 and 128 bits.
- Fully synchronous design
优势
- High-speed ARC4 solution
- Silicon-proven implementation
- Fast and easy to integrate into SoCs
- Flexible layered design
- Complete range of configurations
- World-class technical support
可交付内容
- Documentation
- Hardware Reference and Programmer Manual
- Integration Manual
- Verification Specification
- Synthesizable Verilog RTL source code
- Self-checking RTL test bench, including test vectors and expected result vectors
- Simulation scripts
- Configurations:
- EIP-44a
- Medium-speed
- 6.9K gates
- 3.55 bits/clk
- up to 500 MHz
- EIP-44b
- High-speed
- 6.3k gates
- 6.4 bits/clk
- up to 500 MHz
- EIP-44c
- Very High-speed
- 30.9k gates
- 8.0 bits/clk
- up to 600 MHz
应用
- SSL
- TLS
查看 INSIDE Secure ARC4 Engine 详细介绍：
- 查看 INSIDE Secure ARC4 Engine 完整数据手册
- 联系 INSIDE Secure ARC4 Engine 供应商