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In-System IBERT IP
The LogiCORE In-System IBERT IP enables 2D eye scans of Ultrascale™/Ultrascale+™ transceivers to be performed the in Vivado® Serial I/O Analyzer tool. It utilizes data from the user design to plot the eye scans of transceivers in real-time while they interact with the rest of the system. This IP can be integrated with the user logic in the design or Xilinx transceiver-based IPs such as GT Wizard, Aurora, etc. This document details the IP functionality and different ways for adding it to the user design.
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Embedded IP
- RT-640 Embedded Hardware Security Module (HSM) for Automotive ASIL-B
- RT-645 Embedded Hardware Security Module (HSM) for Automotive ASIL-D
- Secure-IC Securyzr™ Tunable Cryptography solutions with embedded side-channel protections: AES - SHA2 - SHA3 - PKC - RSA - ECC - ML-KEM - ML-DSA - XMSS - LMS - SM2 - SM3 - SM4 - Whirlpool - CHACHA20 - Poly1305
- Post-Quantum Cryptography - xQlave® PQC ML-KEM (Kyber)
- 32-bit Embedded RISC-V Functional Safety Processor
- The SST SuperFlash® IP is an embedded CMOS Flash memory IP with sector/chip Erase and byte Program capability.