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IEEE1588 & IEEE802.1AS PTP Timestamp Unit (TSU) core
NetTimeLogic’s PTP Timestamp Unit is an implementation of a single port Frame Timestamp Unit (TSU) according to IEEE1588-2008 (PTP). It detects PTP frames on a (R)(G)MII tap and timestamps PTP event frames based on a Counter Clock and provides them delay compensated to a PTP Software stack (e.g. PTPd, PTP4l, etc…). The Timestamp Unit can work as PTP Ordinary Clock (OC) as Master and Slave; it can also be used to build a PTP Boundary Clock (BC) by having multiple instances of the IP core connected to multiple Ethernet ports. All configuration can be written, and timestamps read via an AXI4Light-Slave Register interface.
The IP core comes with a Linux Driver for the Xilinx(R) Zynq 70xx (and as template for integration into other SoCs with AXI interface)
The IP core comes with a Linux Driver for the Xilinx(R) Zynq 70xx (and as template for integration into other SoCs with AXI interface)
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Block Diagram of the IEEE1588 & IEEE802.1AS PTP Timestamp Unit (TSU) core
PTP IP
- Software Defined Radio for High Throughput PTP and PTMP network communication
- 10 Gigabit Ethernet MAC with IEEE 1588 PTP Support and AVB for Auto
- IEEE1588 & IEEE802.1AS PTP Ordinary Clock (OC) core
- IEEE1588 & IEEE802.1AS PTP Transparent Clock (TC) core
- IEEE1588 & IEEE802.1AS PTP Hybrid Clock (HC) core
- Gigabit Ethernet MAC with IEEE 1588 PTP Support and AVB for Auto