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IEEE1588 & IEEE802.1AS PTP Ordinary Clock (OC) core
The PTP Ordinary Clock (OC) from NetTimeLogic is an extension to a single port of NetTimeLogic's PTP Transparent Clock (TC). It adds the Sync and Announce message processors to the design which allow synchronization of the clock according to IEEE1588. The OC will run in Slave or Master mode according to the configuration and Best-Master-Clock (BMC) algorithm. For resource optimization the OC can also be implemented as Slave-Only clock.
The OC is intercepting the path between an Ethernet PHY and an Ethernet MAC. This allows message injection in parallel to data transfers from/to the MAC.
All datasets and algorithms are implemented completely in HW.
The OC is intercepting the path between an Ethernet PHY and an Ethernet MAC. This allows message injection in parallel to data transfers from/to the MAC.
All datasets and algorithms are implemented completely in HW.
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Block Diagram of the IEEE1588 & IEEE802.1AS PTP Ordinary Clock (OC) core
PTP IP
- Software Defined Radio for High Throughput PTP and PTMP network communication
- IEEE1588 & IEEE802.1AS PTP Transparent Clock (TC) core
- IEEE1588 & IEEE802.1AS PTP Hybrid Clock (HC) core
- IEEE1588 & IEEE802.1AS PTP Timestamp Unit (TSU) core
- Fast Ethernet 10/100 802.3 MAC with IEEE 1588 PTP Support
- Gigabit Ethernet MAC with IEEE 1588 PTP Support and AVB for Auto