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IEEE 1588 Boundary, Slave And Master Clock
The IPC1703 is a chip on FPGA leveraging Xilinx’s Spartan-6 FPGA supporting 16MB of FLASH memory and 64MB of DDR II memory. The IPC1703 is an application-agnostic, cost effective, reliable and standard compliant IEEE1588v2 Slave and Master designed for enabling applications requiring high synchronization level. The IPC1703 is designed for easy field upgrades to support future enhancements as well as future clock synchronization standards.
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IEEE1588 IP
- Multi Protocol Switch IP Core for Safe and Secure Ethernet Network
- Multi Protocol IO Concentrator (RDC) IP Core for Safe and Secure Ethernet Network
- Multi Protocol Switch IP Core for Safe and Secure Ethernet Network
- Multi Protocol Endpoint IP Core for Safe and Secure Ethernet Network
- Time Sensitive Networking (TSN) Single Port End Node core
- Time Sensitive Networking (TSN) Switched End Node core