MIPI CSI DSI C-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
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IBM10LPE 1.2v/2.5v APLL
This IP is a programmable Analog PLL suitable for high speed clock generation. The high speed VCO can run from 300MHz to 900MHz. By setting DM [3:0] and DN [6:0] to different values according to different CLKIN, CLK will be locked at the multiples of input frequency.
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