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I3C I/O Library
The I3C library provides a bi-directional I/O driver designed for the I3C two-line interface. It is compliant with the MIPI Specification for I3C –Version 1.1, 27 Novenber 2019.
The design supports the IC3 push-pull and open-drain modes as well as legacy Fm and Fm+ open-drain modes at the bus operating voltages of 1.2V and 1.8V.
This 5nm library is available in an inline flip chip implementation.
To design a functional I/O power domain with this cell, an additional library is required – 1.8V Support: Power. That library contains isolated analog I/O, and a full complement of power cells along with spacer cells to assemble a complete pad ring by abutment. An included rail splitter allows multiple power domains to be isolated in the same pad ring while
The design supports the IC3 push-pull and open-drain modes as well as legacy Fm and Fm+ open-drain modes at the bus operating voltages of 1.2V and 1.8V.
This 5nm library is available in an inline flip chip implementation.
To design a functional I/O power domain with this cell, an additional library is required – 1.8V Support: Power. That library contains isolated analog I/O, and a full complement of power cells along with spacer cells to assemble a complete pad ring by abutment. An included rail splitter allows multiple power domains to be isolated in the same pad ring while
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I3C IP
- I3C Host Controller
- MIPI I3C PHY - TSMC (12nm, 7nm, 5nm, and 22nm) - GF 12nm
- TSMC 3nm (N3E) 1.2V/1.8V I3C Libraries
- TSMC 3nm (N3E) 1.2V/1.8V I3C Libraries, multiple metalstacks
- MIPI I3C controller delivers high bandwidth and scalability for integration of multiple sensors
- TSMC 5nm (N5) 1.2V/1.8V I3C Libraries