You are here:
I2S/TDM Multichannel Audio Transceiver
The I2S-TDM IP core is a highly configurable, full-duplex, multichannel serial audio transceiver. The transceiver can act as a controller (master) or a target (slave) for Inter-IC Sound (I2S) and Time-Division Multiplexed (TDM) audio interfaces, exchanging mul-ti-channel audio samples over a configurable number of serial lines (pins).
The I2S-TDM offers a number of configuration options to satisfy a wide range of serial audio interface requirements. The operation mode (controller or target), sample width, sample rate, frame format, number of channels and their allocation to physical lines are all programmable at run time. At synthesis time, designers can choose the maximum number of audio channels and serial data lines the transceiver can support.
The core is designed for ease of use and integration and adheres to the industry’s best coding and verification practices. The core’s control and status registers (CSR) are accessed through a 32-bit AMBA® APB interface, or, optionally, an AXI4 Lite inter-face. The host system exchanges audio data with the core either via this CSR interface or via dedicated AXI4-Stream interfaces. The system interfaces operate with a clock that is independent from the audio master and serial bit clocks, and the core implements clean clock domain crossing boundaries.
The I2S-TDM offers a number of configuration options to satisfy a wide range of serial audio interface requirements. The operation mode (controller or target), sample width, sample rate, frame format, number of channels and their allocation to physical lines are all programmable at run time. At synthesis time, designers can choose the maximum number of audio channels and serial data lines the transceiver can support.
The core is designed for ease of use and integration and adheres to the industry’s best coding and verification practices. The core’s control and status registers (CSR) are accessed through a 32-bit AMBA® APB interface, or, optionally, an AXI4 Lite inter-face. The host system exchanges audio data with the core either via this CSR interface or via dedicated AXI4-Stream interfaces. The system interfaces operate with a clock that is independent from the audio master and serial bit clocks, and the core implements clean clock domain crossing boundaries.
查看 I2S/TDM Multichannel Audio Transceiver 详细介绍：
- 查看 I2S/TDM Multichannel Audio Transceiver 完整数据手册
- 联系 I2S/TDM Multichannel Audio Transceiver 供应商
Block Diagram of the I2S/TDM Multichannel Audio Transceiver
