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I2S Receiver/Transmitter
The logiI2S IP core from Xylon's logicBRICKS™IP library is a module for I2S audio data receiving and/or transmitting. The logiI2S IP's RX and TX submodules are I2S masters only.
The logiI2S is, like the other IP cores from Xylon logicBRICKS™ IP library, fully embedded into Xilinx Platform Studio (XPS) and the EDK.
Therefore it can be easily customized and tuned for optimal slice consumption and features set.
The logiI2S is, like the other IP cores from Xylon logicBRICKS™ IP library, fully embedded into Xilinx Platform Studio (XPS) and the EDK.
Therefore it can be easily customized and tuned for optimal slice consumption and features set.
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audio IP
- Audio codec with capacitor-less 106 dB dynamic range ADC and 120 dB SNR DAC with very low latency filters and ultra low power mode
- High performance, energy efficient 3-issue, quad-mac superscalar DSP core for HD Audio applications based on fourth generation ZSP architecture
- Modern Audio DSP, designed for battery operated, high-performance, audio and voice applications
- Modern, high performance Audio DSP, optimized for far-field noise reduction and Artificial Intelligence speech recognition
- 24bit Audio ADC/24bit Video DAC
- 100 dB of SNR, 24-bit stereo audio CODEC with 8 ADC paths, an embedded regulator and headphone/line-out driver