You are here:
I2C Slave Controller w/FIFO (AXI Bus)
The Digital Blocks DB-I2C-S-AXI Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 4/3 AXI System Interconnect Fabric to an I2C Bus. The I2C is a two-wire bidirectional interface standard (SCL is Clock, SDA is Data) for transfer of bytes of information between two or more compliant I2C devices.
The DB-I2C-S-AXI is a Slave I2C Controller that controls the Transmit or Receive of data to or from external Master I2C devices.
The DB-I2C-S-AXI supports AXI4-Lite, AXI4, AXI3 AMBA specifications.
The DB-I2C-S-AXI is a Slave I2C Controller that controls the Transmit or Receive of data to or from external Master I2C devices.
The DB-I2C-S-AXI supports AXI4-Lite, AXI4, AXI3 AMBA specifications.
查看 I2C Slave Controller w/FIFO (AXI Bus) 详细介绍：
- 查看 I2C Slave Controller w/FIFO (AXI Bus) 完整数据手册
- 联系 I2C Slave Controller w/FIFO (AXI Bus) 供应商
Block Diagram of the I2C Slave Controller w/FIFO (AXI Bus)
