This is a high throughput QAM constellation demapper and Log Likelihood Ratio (LLR) bit-metric generator. The core is capable of accepting a new equalised QAM symbol per clock cycle and generates all the bit-metrics for that symbol after a short latency. The subcarrier QAM modulation is specified each clock cycle to accommodate systems supporting adaptive bit loading. The QAM channel state information (CSI) can be specified on the same clock cycle as the QAM symbol to allow the LLR to be correctly weighted.
- Supports BPSK, QPSK, 16-QAM, 64-QAM, 256-QAM and 1024-QAM
- Generated Log Likelihood Ratio bit metrics
- Produces up to 10 LLR bit-metrics per clock
- Capable of 1.5G LLRs/sec
- Supports adaptive bit loading
- Efficient and flexible implementation
- OFDM throughput of 150M subcarriers/sec or 1.5G LLRs/sec.
- Exceptional internal precision for high order QAM constellations
- Suitable for both ASIC and FPGA implementation.
- Easy to use interface
- RTL source code
- Synthesis scripts
- MATLAB mod