High Throughput QAM Demapper

This is a high throughput QAM constellation demapper and Log Likelihood Ratio (LLR) bit-metric generator. The core is capable of accepting a new equalised QAM symbol per clock cycle and generates all the bit-metrics for that symbol after a short latency. The subcarrier QAM modulation is specified each clock cycle to accommodate systems supporting adaptive bit loading. The QAM channel state information (CSI) can be specified on the same clock cycle as the QAM symbol to allow the LLR to be correctly weighted.

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