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High Speed Via Prog ROM Compiler - UMC 55 nm L55SP
ARM offers an array of silicon proven SRAM, Register File and ROM memory compilers for all types of SoC designs ranging from performance critical to cost sensitive and low power applications. As part of the ARM Processor / Graphics Optimized packages, ARM Fast Cache Instances deliver tuned performance, power and area when building ARM Processors, Graphics and System IP.
可交付内容
- Front End (FE) and Back End (FB) views with full suite of design views and models that support most of the industry's popular design tools can be downloaded from the ARM DesignStart web site at: http://www.arm.com/support/designstart.php
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Embedded Memory IP IP
- The SST SuperFlash® IP is an embedded CMOS Flash memory IP with sector/chip Erase and byte Program capability.
- UFS IP for high-performance, low-power interface targeting embedded or removable non-volatile mass storage memory devices
- UMC 40nm embedded high voltage (eHV) low power Process standard synchronous high density single port register file SRAM memory compiler.
- UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler.
- Dual Port, Low Voltage, GF 55LPx with Embedded Flash, HVt & SVt, SRAM Memory Compiler
- General purpose microprocessor incorporating a high performance L1 cache controller and virtual memory management support for high performance embedded system applications