High-speed ultra-low noise LVDS Driver
查看 High-speed ultra-low noise LVDS Driver 详细介绍:
- 查看 High-speed ultra-low noise LVDS Driver 完整数据手册
- 联系 High-speed ultra-low noise LVDS Driver 供应商
Block Diagram of the High-speed ultra-low noise LVDS Driver

LVDS IP
- TSMC GF LVDS Tx/Rx with optional CMOS I/O
- TSMC FPD-Link / OpenLDI / LVDS forwarded clock SERDES Link
- TSMC 3nm (N3E) 1.5V LVDS
- TSMC 3nm (N3E) 1.2V LVDS Tx/Rx with 1.8V BGR
- Display LVDS/MIPI D-PHY/sub-LVDS combo Transmitter 1.0G/2.5G/1.0Gbps 10-Lane
- LVDS IO handling data rate up to 50Mbps with maximum loading 60pF