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High Speed Low Jitter 16GHz Output LC PLL
Terminus Circuits offers an Analog Phase Locked Loop which is a LC oscillator-based integer-N PLL IP powered at 900 mV. The PLL operates with input reference frequency of 100 MHz makes it applicable for multi-standard clocking applications. The output frequency is 16 GHz, 8 GHz and 4GHz with quadrature outputs for 8GHz and 4GHz.
A reset sequence is designed to achieve phase lock on power up or mode change.
The PLL needs a dedicated power supply to reduce the effect of supply noise on it.
The frequency output is applicable for multiple protocols.
A reset sequence is designed to achieve phase lock on power up or mode change.
The PLL needs a dedicated power supply to reduce the effect of supply noise on it.
The frequency output is applicable for multiple protocols.
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Block Diagram of the High Speed Low Jitter 16GHz Output LC PLL
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