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High-performance 32-bit processor for real-time control
R807 utilizes an 8-stage pipeline and dual-issue out-of-order architecture. In addition to the cache, it implements tightly-coupled memory (TCM), a low-latency peripheral quick access interface, rapid interrupt response and memory ECC check. It is suitable for application fields requiring high real-time performance and reliability, such as SSD's and industrial control.
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Block Diagram of the High-performance 32-bit processor for real-time control
CPU IP
- High Bandwidth Out-of-Order RISC-V CPU IP Core
- Compact, low-power 32-bit RISC CPU
- High-performance 32-bit RISC CPU
- All in one solution for AI in RISC-V
- 2D (vector graphics) GPU IP Further advanced architecture for minimized CPU load and increased pixel performance in vector processing
- 2D (vector graphics) & 3D GPU IP A GPU IP combining 3D and 2D rendering features with high performance, low power consumption, and minimum CPU load