You are here:
High Bandwidth Low Jitter De-Skew PLL
High bandwidth de-skew PLL for minimizing clock tree timing uncertainty. Low Power/ Low Area hard macro with industry leading jitter performance for its power/area class.
查看 High Bandwidth Low Jitter De-Skew PLL 详细介绍:
- 查看 High Bandwidth Low Jitter De-Skew PLL 完整数据手册
- 联系 High Bandwidth Low Jitter De-Skew PLL 供应商