Always-on Voice Activity Detection interfacing with analog microphones
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HDCP IP Core
The Bitec HDCP IP Core is for use with the Bitec DP and HDMI IP cores. It is designed to ease the integration of content protection to FPGA and ASIC based designs with support for versions HDCP 1.3, 1.4 and 2.2.
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HDCP IP
- INSIDE Secure HDCP Engine
- Content Protection (HDCP) 2.2/2.3 embedded security modules (ESMs) for HDMI, DisplayPort, and USB 3.x Type-C interfaces
- HDCP 2.3 Security Module IP on HDMI 2.1/2.0 and DisplayPort 1.4/2.0 (Rx/Tx/Rep)
- HDMI 2.1 eARC Tx PHY & Controller IP (Silicon Proven in TSMC 12FFC)
- HDMI 1.4 Rx PHY & Controller IP (Silicon Proven in Samsung 28FDSOI)
- HDCP 2.0 Encryption Suite