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H.264 Encoder FPGA Core
Our FPGA core is highly optimized and 80% SMALLER AND FASTER THAN THE COMPETITION WITH ⟨ 1ms LATENCY @ 1080p30!
It is capable of being synthesized in many FPGAs and supports H.264 variable and fixed bit-rate encoding of video streams. Encodes video data at 1.5 clocks/pixel. Typical clock rate in an Xilinx SPARTAN 6 is 95Mhz. Typical clock rate in a Xilinx Zynq 7020 is 95MHz. Multiple cores can be used for processing larger size or higher frame rate images. Uses FPGA specific DDR 3 controller and microprocessor soft core. In addition, the standard core can be customized, retaining ITAR compliance, to meet unique functional needs.
It is capable of being synthesized in many FPGAs and supports H.264 variable and fixed bit-rate encoding of video streams. Encodes video data at 1.5 clocks/pixel. Typical clock rate in an Xilinx SPARTAN 6 is 95Mhz. Typical clock rate in a Xilinx Zynq 7020 is 95MHz. Multiple cores can be used for processing larger size or higher frame rate images. Uses FPGA specific DDR 3 controller and microprocessor soft core. In addition, the standard core can be customized, retaining ITAR compliance, to meet unique functional needs.
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H.264 IP
- Enhanced Multi-Format Encoder Supporting AV1
- Up To 5 MPixel Multi-Format Encoder
- 1080p60 Multi-Format Decoder IP
- 4K/8K Scalable Multi-Format Video Decoding IP Core
- H.264 High Profiles Encoder - High 10, High 4:2:2 and High 4:4:4 (12 bit 4:2:2 or 4:2:0) Profiles
- H.264 Baseline Encoder with compressed reference frame store