GSMC 0.18umULL Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler
The compiler supports a comprehensive range of word and bit lengths. While satisfying speed and power requirements, it is optimized for area efficiency.
VeriSilicon GSMC 0.18um Ultra Low Leakage Process High-Speed Synchronous Memory Compiler uses four layers within the blocks and supports metal 4, 5, or 6 as the top metal. Dummy bit cells are synthesized with the intention to enhance reliability
特色
- Ultra Low Leakage
- High Density
- High Speed
- Size Sensitive Self-Time Delay for Fast Access
- Automatic Power Down
- Tri-State Output(SRAM only)
- Write Mask Function(SRAM & Register File)
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