NVM OTP in GF (180nm, 130nm, 65nm, 55nm, 40nm, 28nm, 22nm, 12nm)
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GSMC 0.13μm Low Power Process VCC Detector
This IP contains two Voltage Detector (VDT) circuits and a Power-On-Reset (POR) circuit. The voltage detectors monitor the supply voltage of Bus Supplies VDDQIN and VDDNIN, and the Power-On-Reset circuit generates three reset signals, SVDB, PORB and LVDB, during the power-up and power-down courses.
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