Gigabit Ethernet Media Access Controller IP
- Precise synchronization,
- Traffic shaping for media streams,
- Admission controls, and
- Identification of non-participating devices.
These features permit AVB devices to: a) reserve a portion of network resources through the use of admission control and traffic shaping and b) send and receive new timing-based frames thus enabling support for audio and video applications were synchronization of data streams is important. The Gigabit Ethernet IP provides a 10/100 Mbps Media Independent Interface (MII) and a 1000 Mbps Gigabit Media Independent Interface (GMII). It also supports optional Reduced MII (RGMII), and Serial GMII (SGMII).. The Gigabit Ethernet IP is designed for SoC and mobile applications such as integrated networking devices, PCI-Express Ethernet controllers, and Ethernet adapter cards. The Gigabit Ethernet IP supports half-duplex mode at 10/100 Mbps and full-duplex mode at 10/100/1000 Mbps. The Gigabit Ethernet IP core consists of two configurable FIFOs on both transmit and receive sides to handle the application’s latency during frame transmission and reception. A processor bus master and a 32-bit scatter-gather DMA transfer packets between the internal FIFOs and the host memory to enhance system performance. The Gigabit Ethernet IP supports 4-bit MII based 10/100 Mbps PHY and 8-bit GMII based 10/100/1000 Mbps PHY. A MDIO/MDC (Management Data Input/Output and Management Data Clock) management interface provides control and management functions to external PHY devices. The Gigabit Ethernet IP also provides enhanced programmable features for minimizing applications complexity and pre/post message processing. The Gigabit Ethernet IP supports MIB, SNMP, RMON, VLAN Q-Tag frame, and Jumbo frames. It also includes dynamic generation, checking, and stripping of FCS field, automatic pad field insertion, automatic retransmission and detection of collision frames, collision avoidance and handling. Other features of the Gigabit Ethernet IP includes generation and decoding of PAUSE control frames, frame boundary delimitation, frame synchronization, and error detection.
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