MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5)
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General Purpose Multi-Voltage IO IP, 1.8V/2.5V/3.3V Operations, UMC 0.11um HS/AE process
UMC 0.11um HS/AL process Mini-IO for Multi-Voltage Cell Library.
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