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GDDR7 PHY & Controller
Innosilicon GDDR7 PHY is fully compliant to the JEDEC GDDR7 standard, supporting up to 32Gbps for PAM3 GDDR7. In pam3 mode, the byte consists of ten DQ and one DQE signals, the GDDR7 also supports the NRZ IO signaling mode for low power operation. With Speeds up to 32 Gbps per pin the Innosilicon GDDR7 PHY will offer a maximum bandwidth of up to 128GB/s per memory device. This PHY will be available in advanced FinFET nodes for leading-edge customer integration.
The Innosilicon system-aware design methodology used for IP Cores delivers a customer focused experience with improved time-to-market and first-time-right quality. Innosilicon offers flexible delivery of IP cores and will work directly with the customer to provide a full system signal and power integrity analysis, creating an optimized chip layout. In the end, the customer receives a hard macro solution with a full suite of test software for quick turn-on, characterization and debug.
The Innosilicon system-aware design methodology used for IP Cores delivers a customer focused experience with improved time-to-market and first-time-right quality. Innosilicon offers flexible delivery of IP cores and will work directly with the customer to provide a full system signal and power integrity analysis, creating an optimized chip layout. In the end, the customer receives a hard macro solution with a full suite of test software for quick turn-on, characterization and debug.
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