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FPGA Evaluation Platforms for RISC-V Processor Cores
This FPGA platform aims to simplify the evaluation of a Codasip low-power (L family) or high-performance (H family) embedded cores. The platform is available to companies with an evaluation agreement. The subsystem is based on AHB and provides a variety of commonly-used peripherals which enable the rapid testing and assessing of a core on an Xilinx-based Digilent Nexys A7 FPGA board.
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Block Diagram of the FPGA Evaluation Platform for Codasip Embedded Processor RISC-V cores including AHB interconnect and Peripherals
Processor IP
- RT-630 Programmable Root-of-Trust Security Processor for Cloud/AI/ML SoC FIPS-140
- RT-660 DPA-Resistant Programmable Root-of-Trust Security Processor for Govt/Aero/Defense FIPS-140
- RT-645 Programmable Root-of-Trust Security Processor for Automotive ASIL-D-ready
- Deep Learning Processor
- Complete Neural Processor for Edge AI
- Near-threshold voltage and ultra-wide dynamic voltage and frequency scaling (UW-DVFS)