MIPI C-PHY v1.2 D-PHY v2.1 RX 2 trios/2 Lanes in TSMC (16nm,N6, N5)
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Ethernet Switch 10G
Comcores Ethernet Switch 10G IP core is a highly configurable and size optimized implementation of a non-blocking switch that allows continuous transmissions between 10G Ethernet ports. The switch supports MAC learning, VLAN 802.1Q, and multicast. Each port provides a native interface for XGMII Ethernet PHY devices.
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Block Diagram of the Ethernet Switch 10G
Ethernet IP
- 10G-100G MACsec Security Module for Ethernet
- 224G Ethernet PHY in TSMC (N3E, N2P)
- 112G Ethernet PHY in TSMC (N7, N6, N5, N3P)
- Multi-protocol SerDes PMA - PCIe1 PCIe2 PCIe3 PCIe4 PCIe5 and more
- 1-56/112G Multi-protocol Serdes (Interlaken, JESD204, CPRI, Ethernet, OIF/CEI)
- PCIe Gen 6 SERDES IP - supports up to 112G LR ethernet with low power and latency