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Emulation of RF and channel impairments in Verilog
The BAY9 Virtual RF (VRF) is an IP core written in Verilog, that allows to emulate most system aspects of a typical RF transmission. When connected to a physical layer (PHY) core, the VRF IP core replaces a real RF device between TX-DAC output and RX-ADC input.
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Virtual RF IP
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