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Emulation of RF and channel impairments in Verilog
The BAY9 Virtual RF (VRF) is an IP core written in Verilog, that allows to emulate most system aspects of a typical RF transmission. When connected to a physical layer (PHY) core, the VRF IP core replaces a real RF device between TX-DAC output and RX-ADC input.
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Virtual RF IP
- Linear Regulator, Low Noise optimized for sensitive application such as RF or PLL blocks
- Linear Regulator, Low Noise optimized for sensitive application such as RF or PLL blocks
- Bluetooth controller for connectivity with low-power consumption for extended battery life
- Bluetooth 5 controller for secure connectivity with low-power consumption for extended battery life
- Bluetooth, Thread, and Zigbee controller for secure and concurrent wireless connectivity with low-power consumption
- Wi Fi PHY TestBench IP