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Eight Channel (8CH) LVDS Serializer in Samsung 28FDSOI
The 28FDSOI-LVDS-1250-8CH-TX-PLL is a high performance 8-channel LVDS Serializer implemented using digital CMOS technology. Both the serial and parallel data are organized into eight channels. The parallel data is 7 or 10 bits wide per channel. The input clock is 25MHz to 165MHz. The serializer is highly integrated and requires no external components. The circuit is designed in a modular fashion and desensitized to process variations. This facilitates process migration, and results in a robust design.
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Block Diagram of the Eight Channel (8CH) LVDS Serializer in Samsung 28FDSOI
LVDS IP
- TSMC GF LVDS Tx/Rx with optional CMOS I/O
- TSMC FPD-Link / OpenLDI / LVDS forwarded clock SERDES Link
- TSMC 3nm (N3E) 1.5V LVDS
- TSMC 3nm (N3E) 1.2V LVDS Tx/Rx with 1.8V BGR
- Display LVDS/MIPI D-PHY/sub-LVDS combo Transmitter 1.0G/2.5G/1.0Gbps 10-Lane
- LVDS IO handling data rate up to 50Mbps with maximum loading 60pF