Comcores eCPRI core is a highly scalable and silicon agnostic implementation of the eCPRI standard targeting any ASIC, FPGA or ASSP technologies. The eCPRI implementation builds on long-time experience designing CPRI and Radio-Over-Ethernet solutions for fronthaul and delivers a flexible engine that is prepared for tight integration with software applications.
The solution is prepared to support the legacy solutions and novel Ethernet based radio systems. The IP is designed to meet or exceed the requirements of radio systems, base band systems, C-RAN switches or advanced test systems. The speed optimized core can handle any solutions reaching from the “small footprint” to the more complex applications running 25 Gbps. The IP can dynamically be configured to handle wireless multi-mode radio systems enabling high-performance throughputs required by 4G and 5G wireless solutions. With the availability of demo platforms, Comcores offers a fast track approach to eCPRI bring-up.
- Richly featured and highly configurable
- Support for time-domain IQ transport
- Supports various Ethernet speeds like 10G and 25G
- Easy setup for synchronization
- Wide flexibility for configuring
- Easy to use
- Testbench with typical system configuration and examples
- SW API optionally included in delivery
- HW demonstration platform available
- Silicon Agnostic
- Designed in VHDL and targeting any RTL implementation like ASICs, ASSPs and FPGAs
- Highly Configurable
- Supporting small to large system configurations
- The IP core comes with an extensive documentation that, among others, includes Product Brief and User Manual. The core will by default be delivered encrypted. Source code option is available..
- Enables Ethernet as a connectivity option for Radio's
- RRH Designs
- Baseband designs
- Ethernet fronthaul
Block Diagram of the eCPRI Functional split 8