The CMS0059 has been designed from the ground-up for high-speed and gate-efficient implementation on FPGA and ASIC platforms and offers "near Shannon limit" performance when combined with an advanced FEC decoder solution.
The demodulator provides an adaptable starting point for receiver sub-systems to be used in both the current and next-generation of digital TV set-top-boxes, VSAT terminals and related test and monitoring equipment.
- Optional integrated DVB-S / DSNG decodings.
- Support for CCM, VCM and ACM modes.
- Sync acquisition at -2dB C/N.
- Wide carrier acquisition range.
- Programmable symbol rate recovery
- few kSymb/s to >45 MSymb/s.
- Real IF, zero-IF or near-zero-IF.
- Variable ADC sampling frequency.
- Frame-by-frame (A)PSK selection.
- QPSK, 8PSK, 16APSK, 32APSK.
- Short (16kb) and normal (64kb) frames
- Frames with/without intra-frame Pilots.