65nm OTP Non Volatile Memory for Standard CMOS Logic Process
You are here:
Dual Parallel to Serial ATA 1.5/3.0Gb/s PHY Core
TRC3002CSA is a Dual Serial ATA (SATA) PHY core for interfacing serial data between Storage Device and external 2-port PHY. TRC3002CSA uses double data rate (DDR) transmission for send and receive side. Same Device can operate as a Serial ATA Gen I at 1.5Gb/s and at 3Gb/s Serial ATA Gen 2. Spread Spectrum Clock (SSC) is used to minimize EMI and increase the quality of received signal. It can transmit and receive through a 40-inch cable.
Each transmit section of the TRC3002CSA contains a low-jitter clock synthesizer, an 8-bit or 10-bit parallel to serial converter with built in 8b/10b encoder, and differential high speed Interface output. Its receive section contains an input limiting amplifier with on-chip terminations, a clock/data recovery PLL, a Comma detector, a serial to parallel converter with built-in 8b/10b decoder. OOB circuitry complies with SATA Gen 1 and Gen 2 Standards, featuring COMRESET/COMINIT, and COMWAKE commands and detection.
It has a built-in serial Near and Far End Loopback. SLUMBER and PARTIAL Power Down feature can minimize the power consumption of device. TRC3002CSA is fabricated with TSMC’s advanced 0.13uM CMOS logic process, and is also available as standard product (TRC3002SSA).
Each transmit section of the TRC3002CSA contains a low-jitter clock synthesizer, an 8-bit or 10-bit parallel to serial converter with built in 8b/10b encoder, and differential high speed Interface output. Its receive section contains an input limiting amplifier with on-chip terminations, a clock/data recovery PLL, a Comma detector, a serial to parallel converter with built-in 8b/10b decoder. OOB circuitry complies with SATA Gen 1 and Gen 2 Standards, featuring COMRESET/COMINIT, and COMWAKE commands and detection.
It has a built-in serial Near and Far End Loopback. SLUMBER and PARTIAL Power Down feature can minimize the power consumption of device. TRC3002CSA is fabricated with TSMC’s advanced 0.13uM CMOS logic process, and is also available as standard product (TRC3002SSA).
查看 Dual Parallel to Serial ATA 1.5/3.0Gb/s PHY Core 详细介绍：
- 查看 Dual Parallel to Serial ATA 1.5/3.0Gb/s PHY Core 完整数据手册
- 联系 Dual Parallel to Serial ATA 1.5/3.0Gb/s PHY Core 供应商
SATA IP
- Multi-protocol SerDes PMA - PCIe1 PCIe2 PCIe3 PCIe4 PCIe5 and more
- Multi-protocol SerDes PMA in FDSOI (GF22FDX FDX 22FDX) - PCIe1 PCIe2 PCIe3 PCIe4 and more
- USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 22ULP
- 32G Multi Rate SerDes PHY - GlobalFoundries 22FDX
- 32G Multi Rate Long Reach SerDes PHY - GlobalFoundries 12LP and 12LPP
- 32G Multi Rate Very Short Reach SerDes PHY - GlobalFoundries 12LP and 12LPP