Dual FPD-link, 30-Bits Color LVDS Receiver, 170Mhz (SVGA/FHD@120Hz) LVDS de-serializer 10:70 channel decompression with automatic de-skew

V-Trans ‘s FPD Link Receiver Macro is based on National Semiconductor openLDI specification v0.95 dated May 13th 1999 that allow the transfer of digital display data between a display source and a display device.

This receiver converts 10 LVDS, (low voltage differential signaling) data streams, into 30bits dual pixel CMOS data plus 10 control signals (VSYNC, HSYNC, DE, and 7 user-defined signals).

Thanks to its innovative lane to lane de-skew mechanism this macro can operate up to a maximum pixel rate of 170Mhz, LVDS data line speed is 1.19Gb/s, providing a total maximum bandwidth of 11.9Gb/s (1.487Gbytes per second).

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