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DPI video output to system memory capture IP block
The Virtual Display IP is designed to enable automated testing of the output of display controllers with DPI-2 output interface such as the TES CDC (Customizable Display Controller). While visual inspection of display output may be appropriate during the development phase, it is not a viable approach when setting up an automated validation environment. The Virtual Display IP receives the display output signal and writes it to system memory. The content of the system memory can then be accessed via a software API for further evaluation and tests on CPU side.
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Display Output IP
- VESA DSC (Display Stream Compression) 1.2b Video Encoder
- VESA DSC (Display Stream Compression) 1.2b Video Decoder
- VDC-M (VESA Display Compression-M) Decoder
- One Input to One Output MIPI DSI Display Interface Bridge
- One Input to Two Output MIPI DSI Display Splitter Bridge
- Customizable Display Controller with composition support