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DP1.4 Receiver Controller
This document describes the low power Innosilicon DP 1.4 Receiver controller, which is fully compliant with DP 1.4 specification and eDP 1.4 standard.
INNO DP RX offers a simple implementation and integration for system on chip (SOC) design targeting consumer electronics, with functionality to transmit digital television audiovisual signals. This IP provided by Innosilicon supports all standard and high-definition consumer electronics video formats including FHD 1920x1080 @ 60Hz and up to 24-bit WQXGA 2560x1600 @ 60Hz.
INNO DP RX is optimized for Reduced Bit Rate (1.62Gbps), High Bit Rate (2.7Gbps), High Bit Rate2 (5.4Gbps) as well as optional High Bit Rate3 (8.1Gbps) High-Definition applications with robust timing and small silicon area in a wide range of processes. It contains analog circuits with programmable pre-emphasis, slew rate, output voltage swing and resistor values to drive transmit data with optimal signal quality and distance to an DP device. All DP components are well supported in this IP, including all I/O Library, high-performance wide-range PLL, plus the data symbol synchronization/serialization unit.
INNO DP RX helps reduce system design complexity and cost by accommodating features like an optional I2C slave interface with 5V tolerance and hot plug detection pins.
As a part of the Innosilicon portfolio of leading-edge Receiver interface IPs, the Innosilicon DP Receiver is performance optimized, modular designed and easy to integrate into any motherboard SoC. Preassembled hard Macro IP components are provided for immediate instantiation into an IC design.
INNO DP RX offers a simple implementation and integration for system on chip (SOC) design targeting consumer electronics, with functionality to transmit digital television audiovisual signals. This IP provided by Innosilicon supports all standard and high-definition consumer electronics video formats including FHD 1920x1080 @ 60Hz and up to 24-bit WQXGA 2560x1600 @ 60Hz.
INNO DP RX is optimized for Reduced Bit Rate (1.62Gbps), High Bit Rate (2.7Gbps), High Bit Rate2 (5.4Gbps) as well as optional High Bit Rate3 (8.1Gbps) High-Definition applications with robust timing and small silicon area in a wide range of processes. It contains analog circuits with programmable pre-emphasis, slew rate, output voltage swing and resistor values to drive transmit data with optimal signal quality and distance to an DP device. All DP components are well supported in this IP, including all I/O Library, high-performance wide-range PLL, plus the data symbol synchronization/serialization unit.
INNO DP RX helps reduce system design complexity and cost by accommodating features like an optional I2C slave interface with 5V tolerance and hot plug detection pins.
As a part of the Innosilicon portfolio of leading-edge Receiver interface IPs, the Innosilicon DP Receiver is performance optimized, modular designed and easy to integrate into any motherboard SoC. Preassembled hard Macro IP components are provided for immediate instantiation into an IC design.
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