MIPI D-PHY Universal IP - 4.5Gbps/lane, MIPI D-PHY v2.5 Compliant in TSMC 22ULP
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DLL (All Digital) IP, Input: 333MHz - 800MHz, Output: 333MHz - 800MHz, UMC 90nm SP process
Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range, UMC 90nm SP/RVT Low-K Logic process.
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