You are here:
DisplayPort Receiver Link Controller
Our 5th generation DisplayPort Receiver Link Controller core supports DisplayPort 1.4, 2.0 and embedded DisplayPort 1.4b features, including link rates up to 8.1 Gbps. The highly integrated and configurable base core design includes all required link functionality—Main Link, Secondary Channel, and AUX Channel protocols. It also supports optional Display Stream Compression (DSC), Forward Error Correction (FEC), multi-stream transport (MST), and HDCP standards for data encryption. The DisplayPort Receiver core interfaces use common industry standards for low-complexity integration—with or without a host CPU.
查看 DisplayPort Receiver Link Controller 详细介绍:
- 查看 DisplayPort Receiver Link Controller 完整数据手册
- 联系 DisplayPort Receiver Link Controller 供应商
Block Diagram of the DisplayPort Receiver Link Controller
DisplayPort Controller IP
- Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 12FFC
- DisplayPort Transmitter Link Controller
- USB 3.1/DisplayPort 1.3 Controller IP Solutions
- Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in TSMC 28HPC+
- Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 28HPC
- Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in TSMC 40LP