DisplayPort 1.4 IP-core
This compact and easy-to-use IP-core is available as both source (DPTX) and sink (DPRX).
The solution comes also with a Video Toolbox (VTB) for various video processing tasks including a timing generator, a test pattern generator and video clock recovery.
A thin host driver and API allow easy integration and control of the IP-core.
The IP-core is supported by a wide range of FPGA devices including;
* AMD UltraScale+
* AMD Artix-7
* Intel Cyclone 10 GX
* Intel Arria 10 GX
* Lattice CertusPro-NX
The IP-core source code is available on our GitHub page for your convenience. You can customize and tailor the IP-core to your specific needs and requirements, ensuring that it integrates seamlessly with your system. This also adds trust to your product, knowing that you have complete access to the underlying code.
查看 DisplayPort 1.4 IP-core 详细介绍:
- 查看 DisplayPort 1.4 IP-core 完整数据手册
- 联系 DisplayPort 1.4 IP-core 供应商
DisplayPort IP
- VESA DisplayPort 1.4 Forward Error Correction (FEC) Receiver
- VESA DisplayPort 1.4 Forward Error Correction (FEC) Transmitter
- VESA DisplayPort 1.4 RX IP Subsystem for Xilinx FPGAs
- VESA DisplayPort 2.0 FEC RX
- Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 12FFC
- Multi-protocol SerDes PMA - PCIe1 PCIe2 PCIe3 PCIe4 PCIe5 and more