The M320C50 is a high-performance 16-bit digital signal processor with separate data and program memory. The central ALU has a 32-bit arithmetic logic unit, a 16-bit scaling shifter, and a 16 x 16 parallel multiplier. A separate parallel logic unit performs bit manipulations on any data memory location or control/status register. It uses a four stage instruction pipeline for speed of operation. Peripherals are controlled through 28 memorymapped registers and include: a timer, a serial port, a timedivision-multiplexed serial port, a programmable wait-state generator, an interrupt controller and the I/O ports, 16 of which are memory mapped.