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DFI LPDDR5 PHY IP
DFI LPDDR5 is full-featured, easy-to-use, synthesizable design, compatible with LPDDR5 JESD209-5 specification and DFI-version 5.0 Compliant. Through its DFI LPDDR5 compatibility,it provides a simple interface to a wide range of low-cost devices. DFI LPDDR5 IIP is proven in FPGA environment.The host interface of the DFI LPDDR5 can be simple interface or can be AMBA APB, AMBA AHB, AMBA AXI, VCI, OCP, Avalon, PLB, Tilelink, Wishbone or Custom protocol.
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