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D2D PHY, ADVANCED PACKAGE, TSMC N7/N6
The InPsytech (IPT) D2D PHY is a state-of-the-art physical layer interface designed to provide exceptional performance and efficiency in high-speed data transmission applications. Leveraging advanced IO architecture, energy-efficient design, and real-time monitoring capabilities, IPT D2D sets a new standard for parallel data communication interfaces with applications like data center interconnects, high-speed data communication networks, artificial intelligence, etc.
The IPT D2D PHY delivers an impressive of 6.4 Terabits per millimeter (Tb/mm) with a remarkable energy efficiency rating of 0.43 Picojoules per bit (pj/bit) (PRBS31 pattern, both directions) and a total of end-to-end latency of 3.5nm. This high-speed data processing capability enables rapid transmission and reception of data, ensuring efficient communication in demanding environments. Equipped with a real-time per bit monitor, the IPT D2D PHY offers comprehensive visibility into data transmission performance. This monitoring capability allows users to track the quality of data transmission in real-time, facilitating proactive optimization and troubleshooting for enhanced reliability without compromising performance.
With automatic training, voltage/temperature adaptive receiver and per bit data eye monitor, the InPsytech D2D PHY is easy to program and integrate into Silicon-On-Package with continuous data transmission without error and interruption.
Internal, IO and between-die loopback tests (BIST) are part of the delivery for manufacture test. Two redundant bits per channel are implemented for lane repair to improve manufacture yield.
As shown in the following figure, five layers of wires are used to connect Die 0 (Chiplet 0) to Die 1 (Chiplet 1) using either INFOTM or CoWoSTM package technology.
D2D PHY can also be used to connect dies from different processes, for example, analog blocks can be fabricated using older processes and connect it with computing fabrics manufactured using more advanced processes using IPT D2D PHY.
For further information, please contact representative at sales@inpsytech.com.
The IPT D2D PHY delivers an impressive of 6.4 Terabits per millimeter (Tb/mm) with a remarkable energy efficiency rating of 0.43 Picojoules per bit (pj/bit) (PRBS31 pattern, both directions) and a total of end-to-end latency of 3.5nm. This high-speed data processing capability enables rapid transmission and reception of data, ensuring efficient communication in demanding environments. Equipped with a real-time per bit monitor, the IPT D2D PHY offers comprehensive visibility into data transmission performance. This monitoring capability allows users to track the quality of data transmission in real-time, facilitating proactive optimization and troubleshooting for enhanced reliability without compromising performance.
With automatic training, voltage/temperature adaptive receiver and per bit data eye monitor, the InPsytech D2D PHY is easy to program and integrate into Silicon-On-Package with continuous data transmission without error and interruption.
Internal, IO and between-die loopback tests (BIST) are part of the delivery for manufacture test. Two redundant bits per channel are implemented for lane repair to improve manufacture yield.
As shown in the following figure, five layers of wires are used to connect Die 0 (Chiplet 0) to Die 1 (Chiplet 1) using either INFOTM or CoWoSTM package technology.
D2D PHY can also be used to connect dies from different processes, for example, analog blocks can be fabricated using older processes and connect it with computing fabrics manufactured using more advanced processes using IPT D2D PHY.
For further information, please contact representative at sales@inpsytech.com.
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Block Diagram of the D2D PHY, ADVANCED PACKAGE, TSMC N7/N6
