MIPI D-PHY Rx-Only 2 Lanes in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, N7, N6)
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D/A Converter IP, 10 bits, 75MHz, UMC 65nm LL process
3-channel digital-to-Analog converter (Digital-to-Analog converter) with 10-Bit resolution for video application. UMC 65nm 1.2V/2.5V low leakage (LL) process. It is a current-steering type Digital-to-Analog converter and provides a superior maximum update rate of 75MHz and this IP only require at least 7 metal layers.
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ADC/DAC IP
- 12bit 5Gsps silicon proven High performance Current Steering DAC IP Core
- Audio codec with capacitor-less 106 dB dynamic range ADC and 120 dB SNR DAC with low latency
- 12-bit 12-Gsps Transceiver (ADC/DAC/PLL)
- 8-bit 48-Gsps Transceiver (ADC/DAC/DLL)
- UCIe based 12-bit 12-Gsps Transceiver (ADC/DAC/PLL/UCIe)
- UCIe based 8-bit 48-Gsps Transceiver (ADC/DAC/PLL/UCIe)