Multi Protocol IO Concentrator (RDC) IP Core for Safe and Secure Ethernet Network
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CXL memory expansion
DenseMem increases effective CXL Type 3 Device memory capacity by a factor of 2x through transparent, in-line memory compression/decompression with minimal impact to latency and badwidth. DenseMem is available as an area and power efficient drag and drop IP block portable across the latest process nodes.
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Compression IP
- VESA DSC (Display Stream Compression) 1.2b Video Encoder
- VESA DSC (Display Stream Compression) 1.2b Video Decoder
- ASIL-B Ready ISO 26262 Certified VESA DSC (Display Stream Compression) 1.1 Encoder
- VESA DisplayPort 1.4 RX IP Subsystem for Xilinx FPGAs
- VESA DisplayPort 2.0 FEC RX
- JPEG 2000 Encoder - Up to 16-bit per Component Lossy & Numerically Lossless Image & Video Compression