CXL 3.0 Integrity and Data Encryption Security Module

The Compute Express Link (CXL) interface protocol enables low-latency data communication between system-on-chip (SoC) and general-purpose accelerators, memory expanders, and smart I/O devices requiring high performance, heterogeneous computing for data-intensive workloads. The Synopsys CXL 3.0 Integrity and Data Encryption (IDE) Security IP Module provides confidentiality, integrity and replay protection for flow control units (FLITs) in the case of CXL.cache and CXL.mem protocols, and for FLITs and Transaction Layer Packets (TLP) in the case of CXL.io. The Security Module implements the IDE specification as defined for CXL 3.0 which also references PCI Express 6.0 IDE specification for the CXL.io protocol. The Synopsys CXL 3.0 IDE Security Module integrates seamlessly with the Synopsys CXL controllers to accelerate SoC integration

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