VeriSilicon CSMC 0.13um Low Power(LP) Process Synchronous Memory Compiler optimized for CSMC Technologies Corporation 0.13um 1P8M Low Power 1.5V/3.3V process can flexibly generate memory blocks via a friendly GUI or shell commands.
The compiler supports a comprehensive range of words and bits. While satisfying speed and power requirements, it has been optimized for area efficiency.
VeriSilicon CSMC 0.13um LP Process Synchronous Memory Compiler uses four layers within the blocks and supports metal 6, 7 or 8 as the top metal. Dummy bit cells are designed in with the intention to enhance reliability
- Low Leakage
- High Density
- High Speed
- Size Sensitive Self-Time Delay for Fast Access
- Automatic Power Down
- Tri-State Output(SRAM only)
- Write Mask Function(SRAM & Register File)