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CRC Compiler
The CRC compiler generates high-performance circuits to generate or check CRC checksums for packet-based communication. The CRC compiler's generator uses an Avalon-ST interface to receive data and emits generated checksums on a dedicated output. The CRC compiler's checker similarly uses an Avalon-ST interface to receive a packet with a CRC checksum and uses a dedicated output to indicate if the checksum is correct. The CRC compiler generator and checker MegaCore® functions do not store any data, checksums, or status.
特色
- Highly parameterized cyclical redundancy check (CRC) generator and checker
- CRC-32, CRC-16-ANSI, and CRC-16-CCITT generator polynomials
- High-speed operation, over 250 MHz for many configurations
- Configurable input datapath width, from 1 bit to 256 bits (power-of-two)
- Configurable CRC starting value
- Avalon® Streaming (Avalon-ST) interface for message/codeword bits
- Support for all possible end-of-packet byte residues
- Verilog and VHDL demonstration testbenches
- Easy-to-use MegaWizard® Plug-In Manager interface
- Intellectual property (IP) functional simulation models for use in Altera-supported VHDL and Verilog HDL simulators
- Support for OpenCore Plus evaluation
优势
- SOPC Builder Ready: No
- Qsys Compliant: No
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CRC Compiler
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