RISC-V ARC-V RMX-100 Ultra-low Power 32-bit Processor IP for Embedded Applications
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Configurable Watchdog Timer (WD)
A watchdog is used in systems to prevent system lockup due to software or hardware failures. For normal operation, the timeout counter has to be reset by the CPU in a regular interval. Depending on the watchdog configuration, the watchdog asserts the reset_req and int_req outputs upon expiration of the timeout counters.
To avoid malfunction software to reconfigure the watchdog, all configuration registers are protected by a special lock key. The timeout interval can be configured over a wide range:
* min: 65536 system clock cycles
* max: 67'108'864 system clock cycles
Using a system clock of 40MHz, this results in a timeout window of 1.6ms – 1.67s.
To avoid malfunction software to reconfigure the watchdog, all configuration registers are protected by a special lock key. The timeout interval can be configured over a wide range:
* min: 65536 system clock cycles
* max: 67'108'864 system clock cycles
Using a system clock of 40MHz, this results in a timeout window of 1.6ms – 1.67s.
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Block Diagram of the Configurable Watchdog Timer (WD)
