MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
Compute Express Link (CXL) 1.1/2.0/3.0 Controller
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Block Diagram of the Compute Express Link (CXL) 1.1/2.0/3.0 Controller
PCI-Express controller IP
- PCIe 6.x / PCIe5.x / PCIe4.x / PCIe3.x / PCIe2.x / PCIe1.x Controller
- Gigabit Ethernet 802.3 MAC - Media Access Controller
- Fast Ethernet 802.3 Media Access Controller (MAC)
- Ethernet MAC Controller IP
- 1-112Gbps Long-Reach (LR) Multi-Standard-Serdes (MSS)
- Xtra-Long-Reach (XLR) Multi-Standard-Serdes (MSS)